Publications:
Design Considerations for optimizing performance & cost of Continuous Mode Boost PFC Circuits.Supratim Basu, T.M.Undeland, Fellow, IEEE.
(Presented in Nordic Workshop on Power and Industrial Electronics,Trondheim,Norway,14-16 June 2004).
This paper explores ways, including the use of SiC diodes, to increase the efficiency and switching frequency of Continuous mode Boost PFC Circuits. The dependence of electrical and thermal performances of these PFC circuits on the characteristics of the power switching devices is studied.
By making measurements on a practical 1000W PFC circuit prototype, this paper shows as to how every specific application would need a unique design solution to optimize the cost and performance of a PFC circuit.
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Supratim Basu, T.M.Undeland, Fellow, IEEE.
(EPE-PEMC 2004 Conference in Riga, LATVIA, 1- 3 September 2004)
This paper discusses the causes of input current distortion in ac-dc single-phase rectifier-capacitor filter circuits. The paper also explains the mandatory low-frequency harmonic limits of the European standard EN-61000-3-2 and the way in which these are applied to these circuits. Different power-factor correction (PFC) techniques and strategies useful for meeting this standard are explored in this paper. Simulations and measurement results are provided for some of the techniques.
After providing an understanding of the Class A/D limits of the standard, the transition boundary between them is defined. The practical differences between the Class A/D limits and why it is easier to meet the Class A limits, is clearly explained. Three practical and popular power factor correction strategies are discussed. The passive PFC approach with its various advantages and disadvantages is explained.
A solution to the requirement of having a variable inductance for rectifier circuits that have a variable load, towards meeting the Class A limits, is proposed. After this the low frequency active PFC is described. Lastly the popular high frequency active PFC scheme is discussed explaining its clear advantages of being able to simulate a unity power factor resistive load.
This paper will add to the discussion concerning the harmonic limits by providing a number of feasible methods for limiting the harmonic distortion and complying with EN/IEC 61000-3-2 and other (future) standards.
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Notes on MOSFET Drive Circuits
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